View MC68HC908JL8D_256782.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Addendum
HC908JL8AD/D Rev. 0, 5/2002 Addendum to MC68HC908JL8 Technical Data
This addendum provides update and additional information to the MC68HC908JL8 Technical Data, Rev. 2 (Motorola document number MC68HC908JL8/D)
MC68HC08JL8 MC68HC08JK8
The MC68HC08JL8 is the ROM part equivalent to the MC68HC908JL8. The entire MC68HC908JL8 data book apply to this ROM device, with exceptions outlined in this addendum. Table 1. Summary of MC68HC08JL8 and MC68HC908JL8 Differences
MC68HC08JL8 Memory ($DC00-$FBFF) User vectors ($FFDC-$FFFF) Registers at $FE08 and $FFCF Mask option register ($FFD0) Monitor ROM ($FC00-$FDFF and $FE10-$FFCE) 8,192 bytes ROM 36 bytes ROM Not used; locations are reserved. Defined by mask; read only. $FC00-$FDFF: Not used. $FE10-$FFCE: Used for testing purposes only. 20-pin PDIP (MC68HC08JK8) 20-pin SOIC (MC68HC08JK8) 28-pin PDIP 28-pin SOIC 32-pin SDIP 32-pin LQFP MC68HC908JL8 8,192 bytes FLASH 36 bytes FLASH FLASH related registers. $FE08 -- FLCR $FFCF -- FLBPR Read/write FLASH register. Used for testing and FLASH programming/erasing. 20-pin PDIP (MC68HC908JK8) 20-pin SOIC (MC68HC908JK8) 28-pin PDIP 28-pin SOIC 32-pin SDIP 32-pin LQFP
Available Packages
(c) Motorola, Inc., 2003
HC908JL8AD/D
MCU Block Diagram Memory Map
Figure 1 shows the block diagram of the MC68HC08JL8. The MC68HC08JL8 has 8,192 bytes of user ROM from $DC00 to $FBFF, and 36 bytes of user ROM vectors from $FFDC to $FFFF. On the MC68HC908JL8, these memory locations are FLASH memory. Figure 2 shows the memory map of the MC68HC08JL8.
INTERNAL BUS
M68HC08 CPU CPU REGISTERS ARITHMETIC/LOGIC UNIT (ALU) KEYBOARD INTERRUPT MODULE PORTA DDRA PTA7/KBI7** PTA6/KBI6** PTA5/KBI5** PTA4/KBI4** PTA3/KBI3** PTA2/KBI2** PTA1/KBI1** PTA0/KBI0** PTB7/ADC7 PTB6/ADC6 PTB5/ADC5 PTB4/ADC4 PTB3/ADC3 PTB2/ADC2 PTB1/ADC1 PTB0/ADC0 ADC12/T2CLK SERIAL COMMUNICATIONS INTERFACE MODULE PORTD PTD7/RxD** PTD6/TxD** PTD5/T1CH1 PTD4/T1CH0 PTD3/ADC8 PTD2/ADC9 PTD1/ADC10 PTD0/ADC11
# #
CONTROL AND STATUS REGISTERS -- 64 BYTES
8-BIT ANALOG-TO-DIGITAL CONVERTER MODULE
##
USER ROM -- 8,192 BYTES
2-CHANNEL TIMER INTERFACE MODULE 1
USER RAM -- 256 BYTES PORTB DDRB DDRD 2-CHANNEL TIMER INTERFACE MODULE 2
MONITOR ROM -- 447 BYTES
USER ROM VECTORS -- 36 BYTES
BREAK MODULE
OSC1
CRYSTAL OSCILLATOR RC OSCILLATOR INTERNAL OSCILLATOR
OSC2/RCCLK
POWER-ON RESET MODULE
* RST
SYSTEM INTEGRATION MODULE EXTERNAL INTERRUPT MODULE
LOW-VOLTAGE INHIBIT MODULE DDRE PTE
##
PTE1/T2CH1
#
* IRQ
COMPUTER OPERATING PROPERLY MODULE
PTE0/T2CH0
VDD POWER VSS ADC REFERENCE
* Pin contains integrated pull-up device. ** Pin contains programmable pull-up device. 25mA open-drain if output pin. LED direct sink pin. Shared pin: OSC2/RCCLK/PTA6/KBI6. # Pins available on 32-pin packages only. ## Pins available on 28-pin and 32-pin packages only. Shaded blocks indicate differences to MC68HC908JL8
Figure 1. MC68HC08JL8 Block Diagram
2
Addendum to MC68HC908JL8 Technical Data
MOTOROLA
HC908JL8AD/D MC68HC08JL8 MC68HC08JK8
$0000 $003F $0040 $005F $0060 $015F $0160 $DBFF $DC00 $FBFF $FC00 $FDFF $FE00 $FE01 $FE02 $FE03 $FE04 $FE05 $FE06 $FE07 $FE08 $FE09 $FF0B $FE0C $FE0D $FE0E $FE0F $FE10 $FFCE $FFCF $FFD0 $FFD1 $FFDB $FFDC $FFFF
I/O REGISTERS 64 BYTES RESERVED 32 BYTES RAM 256 BYTES UNIMPLEMENTED 55,968 BYTES ROM 8,192 BYTES UNIMPLEMENTED 512 BYTES BREAK STATUS REGISTER (BSR) RESET STATUS REGISTER (RSR) RESERVED BREAK FLAG CONTROL REGISTER (BFCR) INTERRUPT STATUS REGISTER 1 (INT1) INTERRUPT STATUS REGISTER 2 (INT2) INTERRUPT STATUS REGISTER 3 (INT3) RESERVED RESERVED RESERVED BREAK ADDRESS HIGH REGISTER (BRKH) BREAK ADDRESS LOW REGISTER (BRKL) BREAK STATUS AND CONTROL REGISTER (BRKSCR) RESERVED MONITOR ROM 447 BYTES RESERVED MASK OPTION REGISTER (MOR) -- READ ONLY RESERVED 11 BYTES USER ROM VECTORS 36 BYTES
Figure 2. MC68HC08JL8 Memory Map
MOTOROLA
Addendum to MC68HC908JL8 Technical Data
3
HC908JL8AD/D
Reserved Registers
The two registers at $FE08 and $FFCF are reserved locations on the MC68HC08JL8. On the MC68HC908JL8, these two locations are the FLASH control register and the FLASH block protect register respectively.
Mask Option Register
The mask option register at $FFD0 is read only. The value is defined by mask option (hard-wired connections) specified at the time as the ROM code submission. On the MC68HC908JL8, the MOR is implemented as a FLASH, which can be programmed, erased, and read.
Monitor ROM
The monitor program (monitor ROM: $FE10-$FFCE) on the MC68HC08JL8 is for device testing only. $FC00-$FDFF are unused. Electrical specifications for the MC68HC908JL8 apply to the MC68HC08JL8, except for the parameters indicated below.
Electrical Specifications DC Electrical Characteristics
Table 2. DC Electrical Characteristics (5V)
Characteristic(1) VDD supply current, fOP = 8MHz RC oscillator option Low-voltage inhibit, trip falling voltage Low-voltage inhibit, trip rising voltage Symbol IDD VTRIPF VTRIPR Min Typ(2) Max Unit
Values same as, and characterized from MC68HC908JL8, but not tested. 3.55 (3.60)(3) 3.66 (3.75) 4.02 (4.25) 4.13 (4.40) 4.48 (4.48) 4.59 (4.63) V V
1. VDD = 4.5 to 5.5 Vdc, VSS = 0 Vdc, TA = TL to TH, unless otherwise noted. 2. Typical values reflect average measurements at midpoint of voltage range, 25 C only. 3. The numbers in parenthesis are MC68HC908JL8 values.
Table 3. DC Electrical Characteristics (3V)
Characteristic(1) VDD supply current, fOP = 4MHz RC oscillator option Low-voltage inhibit, trip voltage (No hysteresis implemented for 3V LVI) Symbol IDD VLVI3 Min Typ(2) Max Unit
Values same as, and characterized from MC68HC908JL8, but not tested. 2.1 (2.18)(3) 2.4 (2.49) 2.69 (2.68) V
1. VDD = 2.7 to 3.3 Vdc, VSS = 0 Vdc, TA = TL to TH, unless otherwise noted. 2. Typical values reflect average measurements at midpoint of voltage range, 25 C only. 3. The numbers in parenthesis are MC68HC908JL8 values.
4
Addendum to MC68HC908JL8 Technical Data
MOTOROLA
HC908JL8AD/D MC68HC08JL8 MC68HC08JK8
14 RC frequency, fRCCLK (MHz) 12 10 8 6 VDD 4 2 0 0 10 20 30 Resistor, REXT (k) 40 50
MC68HC908JL8 MC68HC08JL8
CEXT = 10 pF 5V @ 25C OSC1
MCU
REXT
CEXT
Figure 3. RC vs. Frequency (5V @25C)
14 RC frequency, fRCCLK (MHz) 12 10 8 6 VDD 4 2 0 0 10 20 30 Resistor, REXT (k) 40 50
MC68HC908JL8 MC68HC08JL8
CEXT = 10 pF 3V @ 25C OSC1
MCU
REXT
CEXT
Figure 4. RC vs. Frequency (3V @25C) Memory Characteristics Table 4. Memory Characteristics
Characteristic RAM data retention voltage Symbol VRDR Min 1.3 Max -- Unit V
Notes: Since MC68HC08JL8 is a ROM device, FLASH memory electrical characteristics do not apply.
MOTOROLA
Addendum to MC68HC908JL8 Technical Data
5
HC908JL8AD/D
MC68HC08JL8 Order Numbers
These part numbers are generic numbers only. To place an order, ROM code must be submitted to the ROM Processing Center (RPC). Table 5. MC68HC08JL8 Order Numbers
MC Order Number MC68HC08JK8CP MC68HC08JK8MP MC68HC08JK8CDW MC68HC08JK8MDW MC68HC08JL8CP MC68HC08JL8MP MC68HC08JL8CDW MC68HC08JL8MDW MC68HC08JL8CSP MC68HC08JL8MSP MC68HC08JL8CFA MC68HC08JL8MFA Operating Temperature Range -40 C to +85 C -40 C to +125 C -40 C to +85 C -40 C to +125 C -40 C to +85 C -40 C to +125 C -40 C to +85 C -40 C to +125 C -40 C to +85 C -40 C to +125 C -40 C to +85 C -40 C to +125 C Package
20-pin PDIP
20-pin SOIC
28-pin PDIP
28-pin SOIC
32-pin SDIP
32-pin LQFP
NOTE: Temperature grade "M" is available for VDD = 5V only.
6
Addendum to MC68HC908JL8 Technical Data
MOTOROLA
HC908JL8AD/D AMENDMENTS TO MC68HC908JL8/D, REV. 2
AMENDMENTS TO MC68HC908JL8/D, REV. 2
Keyboard Interrupt Page 243, Figure 15-2. Keyboard Interrupt Block Diagram -- Replace with the following block diagram:
NOTE: To prevent false interrupts, user should use software to debounce keyboard interrupt inputs. KBI0 VDD . KBIE0 TO PULLUP ENABLE . KBI7 KEYBOARD INTERRUPT FF . D CLR Q
INTERNAL BUS
ACKK RESET
VECTOR FETCH DECODER KEYF SYNCHRONIZER KEYBOARD INTERRUPT REQUEST
CK
IMASKK
MODEK KBIE7 TO PULLUP ENABLE
Computer Operating Properly (COP)
Page 254, 16.8.2 Stop Mode -- Replace the two paragraphs:
From:
Stop mode turns off the ICLK input to the COP if the STOP_ICLKDIS bit is set in configuration register 2 (CONFIG2). Service the COP immediately before entering or after exiting stop mode to ensure a full COP timeout period after entering or exiting stop mode. After reset, the STOP_ICLKDIS bit is clear by default and ICLK is enabled during stop mode.
To:
Stop mode turns off the ICLK input to the COP and clears the COP prescaler. Service the COP immediately before entering or after exiting stop mode to ensure a full COP timeout period after entering or exiting stop mode. To prevent inadvertently turning off the COP with a STOP instruction, a configuration option is available that disables the STOP instruction. When the STOP bit in the configuration register has the STOP instruction is disabled, execution of a STOP instruction results in an illegal opcode reset.
MOTOROLA
Addendum to MC68HC908JL8 Technical Data
7
HOW TO REACH US: USA/EUROPE/LOCATIONS NOT LISTED: Motorola Literature Distribution P.O. Box 5405, Denver, Colorado 80217 1-800-521-6274 or 480-768-2130 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center 3-20-1, Minami-Azabu Minato-ku, Tokyo 106-8573 Japan 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd. Silicon Harbour Centre, 2 Dai King Street Tai Po Industrial Estate, Tai Po, N.T., Hong Kong 852-26668334 HOME PAGE: http://motorola.com/semiconductors
Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
Motorola and the Stylized M Logo are registered in the U.S. Patent and Trademark Office. digital dna is a trademark of Motorola, Inc. All other product or service names are the property of their respective owners. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. (c) Motorola, Inc. 2003
HC908JL8AD/D Rev. 0 5/2003

▲Up To Search▲

Price & Availability of MC68HC908JL8D

	To Download MC68HC908JL8D Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .